Design Verification Team Lead (Mixed-Signal ASIC)

A leading global semiconductor company in Edinburgh UK (20,000+ employees, 30+ countries) is looking for a Design Verification Team Lead to drive verification on complex mixed-signal ASICs.
This is an ideal step-up role for someone who’s led a small team (2-3 engineers) and wants more ownership, without moving into heavy people management. The package is highly competitive, with a base salary up to £90,000, plus bonus and RSUs on top.
The role
Lead and mentor a small verification team
Define and execute verification strategy (UVM/SystemVerilog)
Oversee functional + formal verification
Collaborate with design & architecture teams
Drive coverage, quality, and delivery
What you’ll bring
Strong design verification background (digital or mixed-signal)
Experience leading small teams or projects
Skills in SystemVerilog, UVM, assertions, coverage
Exposure to mixed-signal / ASIC environments (RNM a bonus)
Why join
Work on globally deployed technology
Clear path into technical leadership
Relocation support available
High-impact role in a growing, innovative business
Who this suits
Senior Engineers stepping into leadership
Small team leads wanting more scope and visibility
Engineers open to relocation + global projects
If you want influence, ownership, and real technical leadership (without becoming a full-time manager), this is a strong move.
Interested? Contact me directly – Steph Hutchinson